1. Field of the Invention
This invention relates generally to the manufacturing of SiGe films, such as those used for integrated circuit fabrication. More particularly, the invention relates to methods for producing thin strain relaxed SiGe buffer layers.
2. Description of the Related Art
Relaxed SiGe buffer layers are used to produce strained silicon films on various substrates, including bulk silicon wafers and silicon-on-insulator (“SOI”) wafers. These SiGe buffer layers are typically relatively thick, especially on bulk silicon wafers. The defect density in the SiGe is often difficult to control, particularly at high Ge concentration.
Strained semiconductor materials advantageously provide improved electrical carrier mobility properties as compared to relaxed semiconductor materials, thus increasing the speed at which semiconductor circuits can operate. A semiconductor layer is said to be “strained” when it is constrained to have a lattice structure in at least two dimensions that is the same as that of the underlying single crystal substrate, but different from its inherent lattice constant. Lattice strain occurs because the atoms in the deposited film depart from the positions normally occupied when the material is deposited over an underlying structure having a matching lattice structure. Depending on the thickness of the strained layer, the degree of strain is related to several factors, including the thickness of the deposited layer and the degree of lattice mismatch between the deposited material and the underlying structure.
Strained semiconductor layers can be formed by epitaxially depositing silicon over a strain-relaxed silicon germanium layer. Silicon germanium (hereinafter “SiGe”) films are used in a wide variety of semiconductor applications, such as in microelectronics fabrication. Because SiGe has a larger lattice constant than silicon, when epitaxial SiGe deposition occurs over silicon (such as during deposition on a silicon wafer), the epitaxially deposited SiGe is “strained” to the smaller underlying silicon lattice. If a strained silicon layer is to be deposited over the SiGe layer, the SiGe layer should first be “relaxed” to its natural lattice constant so that the silicon layer deposited thereover will be strained. In particular, because a strained SiGe layer has the dimensions of the underlying silicon lattice, a silicon layer deposited over a strained SiGe layer will not be strained. In contrast, a silicon layer deposited over a strain-relaxed SiGe layer will be strained to conform to the larger underlying SiGe lattice. Thus, a strained silicon layer can be produced by epitaxially depositing silicon over a relaxed SiGe layer.
As the thickness of a strained SiGe layer increases beyond a “critical thickness,” defects in the crystal structure of the strained SiGe layer appear, thereby inducing relaxation. The critical thickness depends on a variety of factors, including growth rates, temperature, the degree of lattice mismatch, which is determined by the germanium concentration, and the number of defects within the layer underlying the SiGe layer. Unfortunately, relaxation is often accompanied by vertically propagating threading dislocations, which can adversely affect device operation.
To improve device performance, a trend is developing for replacing conventional “bulk” silicon wafers with so-called silicon-on-insulator (“SOI”) wafers. The advantage of SOI technology is that the silicon in which transistors are made is not in electrical contact with the remainder of the wafer, such that no cross-talk among transistors takes place through the wafer bulk. The transistors are more effectively electrically isolated from one another.
SOI technology typically employs a thin (e.g., about 100 nm) insulating layer between the active semiconductor layer and the wafer, across the entire wafer or at least in those areas where active devices will be formed in the semiconductor layer. Silicon oxide, silicon nitride, or a combination of the two are typically employed as the insulating layer. These materials are amorphous, have excellent electrical properties, and the technology for integrating silicon nitride and/or silicon oxide is very well developed.
Two conventional technologies have been developed forming the SOI structures. One technology, known as SIMOX, starts with a semiconductor structure such as a silicon wafer and employs high energy implantation of oxygen atoms to form an oxide layer greater than about 100 nm below the surface of the silicon wafer. High temperature annealing then forms a buried silicon oxide, and at the same time repairs crystal defects in the surface silicon that are created by implantation. The surface silicon remains a semiconductor material, and the crystal structure thereof is restored by the annealing process. These steps are rather expensive, however, and the quality of the insulating layer and the active silicon thereover is somewhat compromised.
Another method for forming SOI structures is based on bonding a sacrificial silicon wafer onto an oxidized silicon wafer. By grinding or other thinning process, the sacrificial silicon wafer is reduced to a very thin, active semiconductor layer over the oxide from the other substrate. The thinning process, however, is critical to achieving high quality in the SOI structure, since the ultimately desired thickness uniformity of the active semiconductor layer is about 5 nm±0.1 nm. Furthermore, the bonding and thinning processes are complicated and rather expensive.
Strained silicon and SOI are complementary technologies and several attempts have been made to fabricate SiGe-On-Insulator (SGOI) substrates.
An attractive method to obtain SiGe on bulk silicon or an SOI substrate is to epitaxially deposit a strained SiGe layer, keeping the thickness and the Ge concentration below values at which the film relaxes. The SiGe film is then oxidized in such a way as to selectively oxidize the silicon, thereby extracting the silicon from the SiGe film. As a result, the Ge is concentrated in the remainder of the film. This has been found to result in a controlled relaxation of the SiGe, with a relatively low number of threading dislocations. See, for example, Takagi et al. Materials Sci. and Eng. B89:426–434 (2000). However, as the oxidation process consumes the silicon from the top of the structure, the germanium concentration below increases, creating a higher concentration of Ge in the remaining SiGe film near the top of the structure. As a result, most of the dislocations occur near the top of the film, which can lead to defective formation of the subsequently deposited strained silicon layer.